Pursuant to 35 U.S.C. 119(a)-(d), this application claims priority from German application no. 101 35 786.9, filed Jul. 23, 2001.
The invention relates to an output driver device for an integrated circuit in accordance with claim 1 and to a method for outputting an output signal from an output driver device in accordance with claim 8.
Output driver devices (off chip driver, OCD) are used for signal outputting in particular in semiconductor components. The output driver device in this case represents the interface between the integrated circuit and its periphery and must satisfy a multiplicity of specifications with regard to the signal outputting (such as, for example, a suitable edge steepness (slew rate), short-circuit driver strength, access time (tAC), hold time (tOH) etc.).
Conventional output driver devices suffer from the disadvantage that the number of specifications to be complied with in respect of the signal outputting are often more numerous than the xe2x80x9cdegrees of freedomxe2x80x9d of the output driver device. In order, for example, to set the edge steepness of a signal to be output in a specification-conforming manner, it is usually necessary to make interventions in the output driver device which lead to a multiplicity of undesirable changes to other specifications. This is because, conventionally, complying with required specifications of the output driver device is achieved by suitably altering individual transistor parameters of the output driver device. However, each change in an individual transistor parameter influences the entire switching behavior of the output driver device, as a result of which an iterative approximation with a multiplicity of steps is required in order to satisfy all the specifications.
In view of these disadvantages, it is an object of the invention to specify an output driver device which, in a simple manner, can be coordinated with a multiplicity of specifications to be complied with. Furthermore, it is an object of the invention to specify a corresponding method for outputting an output signal from an output driver device.
This object is achieved according to the invention by means of an output driver device in accordance with claim 1 and a method in accordance with claim 8. The dependent claims relate to preferred embodiments.
According to the invention, an output driver device for an integrated circuit comprises
at least one output device, which has at least one output terminal for an output signal to be output from the output driver device;
at least one input terminal for an input signal to be input into the output driver device; and
at least one control device, which is signal-connected to the output device and the input terminal and is designed for the transformation of the input signal into at least two mutually different control signals and for the outputting of the control signals via control signal outputs to the output device,
the output device being designed for the generation of the output signal in a manner dependent on the control signals. According to the invention, an additional control device is provided between the output device, which outputs the output signal to an, in particular, external output terminal, and the input terminal of the output driver device. This control device is designed to transform or convert the input signal present at the input terminalxe2x80x94which may also be a node in an integrated circuitxe2x80x94into two mutually different control signals. The output device subsequently generates the output signal in a manner dependent on these at least two control signals.
Since the input signal is thus transformed into two different control signals by the control device and the output signal is generated in a manner dependent on these control signals, the control device provides at least one additional xe2x80x9cdegree of freedomxe2x80x9d for the coordination of the output driver device for satisfying the required specifications in respect of the signal outputting. This is because the control device can preferably be designed such that the control signals differ from the input signal in such a way that a required specification, for example the edge steepness of the output signal, is satisfied. The output driver device preferably comprises a control device which is designed for a transformation of the input signal into a multiplicity (e.g. 4) of mutually different control signals. In this case, three additional degrees of freedom are obtained for the co-ordination of the output driver device.
In accordance with one preferred embodiment of the invention, the control signals and the input signal are binary pulse signals and the control device is designed for a transformation of the input signal such that at least one of the control signals differs from the input signal by at least one relative temporal shift of at least one of the signal edges of the control signal with respect to the corresponding signal edge of the input signal. Consequently, the control device is designed for a time sequence variation of the input signal. In this connection, binary pulse signals are understood to be voltage signals which comprise, in particular, essentially rectangle-like pulses with a lower voltage value (low) and an upper voltage value (high). The control device preferably transforms the input signal in such a way that the input signal differ [sic] from at least one of the control signals by virtue of the temporal position of the rising/falling signal edges of corresponding pulses between input signal and control signal. This makes it possible, for example by means of a predetermined time delay of the signal edges of one of the control signals relative to the input signal, to output such control signals to the output device which serve for more advantageous switching of the output device for the purpose of satisfying the specifications.
In accordance with a further preferred embodiment, the control device is designed for a transformation of the input signal such that rising signal edges of the control signal (i.e. low-high transitions) are time-delayed by a first delay time and falling signal edges of the control signal (i.e. high-low transitions) are time-delayed by a second delay time relative to the corresponding signal edges of the input signal. The first delay time may deviate from the second delay time in this case. Such time control of the control signals according to the invention enables greater flexibility when switching individual transistors of the output device, as a result of which specifications that are to be satisfied by the output driver device can be established more easily.
In accordance with a further preferred embodiment, the control device comprises at least one NOR and at least one NAND gate, whose gate outputs are in each case electrically connected precisely to one of the control signal outputs. The control device comprises at least two inverters whose inverter outputs are in each case electrically connected to a gate input both of the NOR and of the NAND gate and whose inverter inputs are in each case electrically connected to the input terminal. The gates and/or inverters of the control device are chosen in such a way that the control signals generated by the control device differ from one another in particular in terms of their time sequence. By way of example, the first control signal differs from the input signal by virtue of a long time delay of rising signal edges of the control signal relative to the corresponding signal edge of the input signal and an only short time delay in the case of falling signal edges. By contrast, the second control signal could differ from the input signal by virtue of a short time delay in the case of rising signal edges and a long time delay in the case of falling signal edges. The better control thereby obtained over switching instants of the output device (an additional xe2x80x9cdegree of freedomxe2x80x9d) simplifies the satisfying of the required specifications. In order to obtain such time sequence control by the control device, the gates and/or the inverters may differ from one another in terms of their physical characteristic quantities (for example through different ratios of channel length to channel width of the transistors used).
Preferably, the control device comprises four of the inverters and in each case two of the NOR and NAND gates. Preferably, in this case two of the inverter outputs are electrically connected to in each case a gate input of one of the NOR and one of the NAND gates and two of the inverter outputs are electrically connected to in each case two gate inputs of one of the NOR and one of the NAND gates. Such a control device is designed for the transformation of the input signal into four mutually different control signals, so that three additional xe2x80x9cdegrees of freedomxe2x80x9d are obtained. Through a suitable choice of (different) inverters and/or gates, it is possible in this case to establish the temporal position of the rising and falling signal edges of the control signals for the purpose of better control of the switching behavior of the output device. A circuit with four parallel-connected inverters whose outputs are connected to corresponding inputs of the NOR and NAND gates is preferably taken into consideration in this case.
Such an arrangement of the control device advantageously enables a significant reduction of an undesirable shunt current (a current flow from VCCQ to VSSQ through the driver transistors) through driver transistors of an output-side inverter circuit of the output device, since the control signals can be chosen in such a way that both the p-type and the n-type transistor of the inverter circuit are never simultaneously in an on state.
In accordance with a further preferred embodiment, the output device comprises at least one output-side inverter circuit and at least two input-side inverter circuits with in each case a p-type and an n-type transistor (p-channel and n-channel transistors),
an inverter output of the output-side inverter circuit being electrically connected to the output terminal,
the gate of the p-type transistor of the output-side inverter circuit being electrically connected to an inverter output of the first input-side inverter circuit,
the gate of the n-type transistor of the output-side inverter circuit being electrically connected to an inverter output of the second input-side inverter circuit, and
the gates of the p-type and n-type transistors of the input-side inverter circuits being electrically connected to the control signal outputs of the control device.
The output device thus comprises essentially two cascaded inverter stages, the output of the output-side inverter circuit representing the output terminal of the output driver device. The gates of the p-type transistor and the n-type transistor of the output-side inverter circuit are electrically connected to the inverter outputs of two inverter circuits arranged on the input side, so that the two inputs of the output-side inverter circuit can be addressed separately. The inputs of the input-side inverter circuit, i.e. the gates of the two p-type and n-type transistor pairs, are connected to the control signal outputs of the control device. If a control device with two control signal outputs is chosen, then it is possible, for example, for the gates of the p-type and n-type transistors of the first input-side inverter circuit to be electrically connected to the first control signal output and the gates of the n-type and the p-type transistors of the second input-side inverter circuit to be electrically connected to the second control signal output.
What is particularly advantageous in this connection is a configuration with four control signal outputs, each gate of the four transistors of the input-side inverter circuits being connected precisely to one control signal output. As a result of this, the switching behavior of each transistor of the input-side inverter circuits can be controlled independently of the other transistors, as a result of which the output driver device can be co-ordinated particularly simply and effectively. What is particularly advantageous, accordingly, is an output driver device in which the control device is designed for the transformation of the input signal into four mutually different control signals and in which the control device comprises four control signal outputs which are in each case electrically connected precisely to one of the gates of the transistors of the input-side inverter circuits.
According to the invention, a method for outputting an output signal from an output driver device, preferably according to the invention, comprises the following steps:
inputting of an input signal into a control device of the output driver device;
transformation of the input signal into at least two mutually different control signals by means of the control device;
outputting of the control signals from the control device to an output device of the output driver device;
generation of an output signal by means of the output device in a manner dependent on the control signals; and
outputting of the output signal to an output terminal of the output device.
By virtue of the transformation of the input signal into at least two mutually different control signals, the method according to the invention accordingly provides at least one additional xe2x80x9cdegree of freedomxe2x80x9d for the co-ordination of the output driver device, so that specifications to be satisfied in respect of the signal outputting can be set more simply.
In accordance with one preferred embodiment of the method according to the invention, the control signals and the input signal are binary pulse signals and the input signal is transformed in such a way that at least one of the control signals differs from the input signal by at least one relative temporal shift of the signal edges of the control signal with respect to the corresponding signal edges of the input signal. In this connection, a binary pulse signal is understood to be a voltage signal which has, in particular, essentially rectangular pulses between a low and a high voltage value.
Preferably, the input signal is transformed in such a way that rising signal edges of the control signal are time-delayed by a first delay time and falling signal edges of the control signal are time-delayed by a second delay time relative to the corresponding signal edges of the input signal.